ADC Clock Jitter SNR Calculator
Estimate the sine-wave SNR ceiling from independent RMS aperture and clock jitter, with a stated ENOB equivalent.
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Result
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Calculation steps
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How to calculate
Combine independent jitter in quadrature and apply the small-jitter sine-wave derivative relation.
Total jitter=√(clock²+aperture²); SNRj=−20 log10(2π f tj); ENOB equivalent=(SNRj−1.76)/6.02
Worked example
A 10 MHz sine sampled with total RMS jitter 1 ps gives jitter-limited SNR about 84.0364026 dB.
Assumptions and input details
Total jitter must be positive and 2π f tj must be below 0.1 for the small-jitter scope. ENOB is only a full-scale ideal-sine SNR equivalent; quantization, distortion and other noise sources are not included.
References: Analog Devices: ADC SNR method
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Results use floating-point arithmetic and displayed rounding. Read the formula, assumptions and any stated data precision before interpreting the result.
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